Abstract
An efficient microwave network method is proposed for signal and power integrity analysis of a multilayer printed circuit board with multiple vias and decoupling capacitors. the multilayer parallel plate structure is described as a cascaded microwave network. the admittance matrix of a single plate pair with ports defined in via holes both on top and bottom plates is obtained through the intrinsic via circuit model and impedance matrix between two plates. a recursive algorithm is provided to obtain the combined admittance matrix of two layers of plate pair coupled through via holes on a common plate. Decoupling capacitors are naturally treated as impedance loads to the cascaded admittance network. Numerical simulations and measurements have been used to validate the method and good agreements have been observed. While the method is as accurate as full-wave numerical solvers, it achieves much higher efficiencies both in CPU time and memory requirements. © 2006 IEEE.
Recommended Citation
Y. J. Zhang et al., "Systematic Microwave Network Analysis for Multilayer Printed Circuit Boards with Vias and Decoupling Capacitors," IEEE Transactions on Electromagnetic Compatibility, vol. 52, no. 2, pp. 401 - 409, article no. 5427046, Institute of Electrical and Electronics Engineers, May 2010.
The definitive version is available at https://doi.org/10.1109/TEMC.2010.2040389
Department(s)
Electrical and Computer Engineering
Keywords and Phrases
Decoupling capacitors; Intrinsic via circuit model; Microwave network method; Printed circuit board (PCB); Signal integrity/power integrity (SI/PI)
International Standard Serial Number (ISSN)
0018-9375
Document Type
Article - Journal
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.
Publication Date
01 May 2010
