Abstract

An irregular plate pair with multiple vias is analyzed by the segmentation method that divides the plate pair into a plate domain and via domains. in the via domains, all the parallel-plate modes are considered, while in the plate domain, only the propagating modes are included to account for the coupling among vias and the reflection from plate edges. Boundary conditions at both vias and plate edges are enforced and all parasitic components of via circuit are expressed analytically in terms of parallel-plate modes. the work presented in this paper indicates that a previous physics-Based via circuit model from intuition is a low-frequency approximation. Analytical and numerical simulations, as well as measurements, have been used to validate the intrinsic via circuit model. © 2010 IEEE.

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

Intrinsic via circuit model; parallel-plate modes; physics-based via circuit model; segmentation technique; signal and power integrity

International Standard Serial Number (ISSN)

0018-9480

Document Type

Article - Journal

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.

Publication Date

01 Aug 2010

Share

 
COinS