Implementation of Buried Capacitance in High-speed Designs
Abstract
A project to determine the performance benefits of embedded capacitance used a power ground simulation tool to compare the impendence and resonances of the standard high-speed design with one using embedded materials of varying dielectric constant (Dk) and thickness. the project aimed to redesign a board with embedded capacitors and compare the performance to the standard design. a correlation of simulated to measured performance found that thin capacitor substrates have an effect on the characteristics of power/ground planar power bus structures. the project results show that a large DC capacitance is beneficial for power bus, as it can store more charge for logic transitions and decrease power bus impendence at low frequencies. the power bus noise voltage in the 1.5V/Ground Pair measured at one location shows that PCB is produced with less noise than the standard FR-4 board.
Recommended Citation
J. Fan et al., "Implementation of Buried Capacitance in High-speed Designs," Printed Circuit Design and Fab, vol. 25, no. 3, pp. 30 - 35, CMP Media LLC, Mar 2008.
Department(s)
Electrical and Computer Engineering
International Standard Serial Number (ISSN)
1939-5442
Document Type
Article - Journal
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 CMP Media LLC, All rights reserved.
Publication Date
01 Mar 2008