Abstract

In modern high performance networking systems, high-speed channels are among the most concerns due to the channel loss, discontinuities and crosstalk as data rate reaches 15 Gbps (Gigabit per second) and above through backplane. Full-wave modeling and system level simulations are widely used to estimate the performance for high-speed channels. Due to the variations and uncertainties associated with the simulation and manufacturing, correlation between simulation and measurement is often used to gain confidence on the channel performance prediction. in this paper, a high-speed channel including the portion inside a high-end ASIC (Application-Specific Integrated Circuit) package and the portion on a PCB (Printed Circuit Board) are investigated. the FSV (Feature Selection Validation) method is used to correlate the channel simulation and measurement, and quantitative conclusions between modeling and measurement are given for the studied channels. © 2012 IEEE.

Department(s)

Electrical and Computer Engineering

International Standard Book Number (ISBN)

978-146732061-0

International Standard Serial Number (ISSN)

2158-1118; 1077-4076

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.

Publication Date

12 Dec 2012

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