Analysis of Power Supply Induced Jitter of High Speed Output Buffer with On-Die Low-Dropout Voltage Regulator
Abstract
In this paper, a methodology to analyze the power supply induced jitter (PSIJ) of high speed output buffer with on-die low-dropout (LDO) voltage regulator is presented. The approach relies on separate analysis of the LDO block and the buffer block. The total system level PSIJ analysis is achieved by combining the stand-alone results together. The AC analysis of power supply rejection ratio (PSRR) of LDO is performed. The loading effect of the buffer is also included. The PSIJ sensitivity analysis of the output buffer is obtained by transient analysis varying the frequency of sinusoidal power rail noise. The system PSIJ sensitivity analysis is completed by multiplying the LDO block PSRR response with the buffer block PSIJ sensitivity. This procedure allows designer to evaluate the system PSIJ with fewer and faster simulations. The contribution of different blocks can be clearly revealed. The proposed approach is validated through Hspice simulation of the entire system level circuit. Reasonably good accuracy has been achieved with the proposed analysis method.
Recommended Citation
Y. Sun et al., "Analysis of Power Supply Induced Jitter of High Speed Output Buffer with On-Die Low-Dropout Voltage Regulator," Proceedings of the 2021 Joint IEEE International Symposium on EMC/SI/PI, and EMC Europe (2021, Raleigh, NC), pp. 318 - 322, Institute of Electrical and Electronics Engineers (IEEE), Aug 2021.
The definitive version is available at https://doi.org/10.1109/EMC/SI/PI/EMCEurope52599.2021.9559281
Meeting Name
2021 IEEE International Joint Electromagnetic Compatibility Signal and Power Integrity and EMC Europe Symposium, EMC/SI/PI/EMC Europe 2021 (2021: Jul. 26-Aug. 13, Raleigh, NC)
Department(s)
Electrical and Computer Engineering
Research Center/Lab(s)
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
Buffer; Low-Dropout (LDO) Voltage Regulator; Power Supply Induced Jitter (PSIJ); Power Supply Rejection Ratio (PSRR)
International Standard Book Number (ISBN)
978-166544888-8
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2021 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
13 Aug 2021
Comments
This work was supported in part by the National Science Foundation (NSF) under Grant IIP-1916535.