A Generalized Power Supply Induced Jitter Model based on Power Supply Rejection Ratio Response

Alternative Title

A Generalized Power Supply Induced Jitter Sensitivity Analysis Method Based on Power Supply Rejection Ratio Response

Abstract

In this work, a generalized power supply induced jitter (PSIJ) model is proposed. The PSIJ sensitivity is obtained based on the evaluation of driver power supply rejection ratio (PSRR) response. The voltage ripple at the driver output is transformed into driver output jitter with the slope of the switching edge. The time-averaged effect of power noise during the time range of driver propagation delay is also considered. The proposed model is applied to estimate the PSIJ sensitivity for typical inverter type of drivers and a low-voltage differential signaling (LVDS) type of current mode differential transmitter. Depending on the transistor working region in the driver, the PSIJ sensitivity frequency dependence could be dominated by either the propagation delay or the PSRR response. The accuracy of the predicted PSIJ sensitivity is verified by simulation. Reasonably good accuracy has been achieved in terms of both the magnitude and phase.

Department(s)

Electrical and Computer Engineering

Research Center/Lab(s)

Intelligent Systems Center

Keywords and Phrases

Differential Transmitter; Inverter; Power Supply Induced Jitter (PSIJ); Power Supply Rejection Ratio (PSRR); Propagation Delay

International Standard Serial Number (ISSN)

1063-8210; 1557-9999

Document Type

Article - Journal

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2021 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Jun 2021

Link to Full Text

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