Department
Electrical and Computer Engineering
Major
Electrical Engineering
Research Advisor
Watkins, Steve E.
Advisor's Department
Electrical and Computer Engineering
Funding Source
Core Memory Circuits LLC
Abstract
This paper analyzes the performance of a quaternary core memory circuit and its components. The multi-valued logic design consisting of two drivers and a transistor matrix is simulated using Mentor Graphic software. Functional operation of the circuit is shown, and propagation delay and power consumption are determined. The design is dependent on the voltage values for the multivalued logic. Three logic cases are investigated. The performance of the core memory as a quaternary difference calculator and its application in preprocessors is described.
Biography
Mahsa is a senior in Electrical Engineering at University of Missouri-Rolla. She is a member of Eta Kappa Nu and of IEEE. She is going to start her master's degree in University of Missouri-Rolla next semester.
Research Category
Engineering
Presentation Type
Oral Presentation
Document Type
Presentation
Location
Havener Center, Missouri Room
Presentation Date
11 April 2007, 9:30 am - 10:00 am
Performance of a Quaternary Logic Design
Havener Center, Missouri Room
This paper analyzes the performance of a quaternary core memory circuit and its components. The multi-valued logic design consisting of two drivers and a transistor matrix is simulated using Mentor Graphic software. Functional operation of the circuit is shown, and propagation delay and power consumption are determined. The design is dependent on the voltage values for the multivalued logic. Three logic cases are investigated. The performance of the core memory as a quaternary difference calculator and its application in preprocessors is described.
