Masters Theses
Abstract
"This paper studies the diagnosability of various types of binary address decoders. An attempt is made to develop a theory of diagnosis for logical faults that might occur in these logic nets. The developed theory is used to analyze these logic nets for various input combinations. Finally, the derivation of optimum diagnostic test sequences is considered"--Abstract, Page i.
Advisor(s)
Szygenda, Stephen A.
Department(s)
Electrical and Computer Engineering
Degree Name
M.S. in Electrical Engineering
Publisher
University of Missouri--Rolla
Publication Date
1969
Pagination
v, 52 Pages
Rights
© 1969 Girishchandra Mahendrakumar Gandhi, All rights reserved.
Document Type
Thesis - Open Access
File Type
text
Language
English
Subject Headings
Combinational circuitsDecoders (Electronics)
Thesis Number
T 2310
Print OCLC #
6013358
Electronic OCLC #
844732728
Recommended Citation
Gandhi, Girishchandra Mahendrakumar, "Study of diagnosability of binary address decoders" (1969). Masters Theses. 7049.
https://scholarsmine.mst.edu/masters_theses/7049