Analyzing testing methodologies on a VHDL model of the 8051 microcontroller

Author

Gary Cyle Wall

Abstract

“The relationship between the formal testing techniques employed and the class of errors that they detect is investigated. This analysis is drawn from results found while testing a hardware description language model of the 8051 microcontroller. The performance of black box, white box, and fault injection verification methodologies is covered. The test models supplied with the code are analyzed and more efficient test sets are examined. The functional errors uncovered during black box testing, the structural faults discovered while performing white box testing, and the combination of both functional and structural defects realized during fault injection testing are discussed”--Abstract, page iii.

Advisor(s)

Miller, Ann K.

Committee Member(s)

Beetner, Daryl G.
Liu, Xiaoqing Frank

Department(s)

Electrical and Computer Engineering

Degree Name

M.S. in Computer Engineering

Comments

A CD containing 8051 VHDL Model, test ROM models, and line coverage summary files is available in the book at the Missouri S&T Library.

Publisher

University of Missouri--Rolla

Publication Date

Summer 2000

Pagination

viii, 86 pages

Note about bibliography

Includes bibliographical references (pages 84-85).

Rights

© 2000 Gary Cyle Wall, All rights reserved.

Document Type

Thesis - Restricted Access

File Type

text

Language

English

Thesis Number

T 7824

Print OCLC #

45892312

Recommended Citation

Wall, Gary Cyle, "Analyzing testing methodologies on a VHDL model of the 8051 microcontroller" (2000). Masters Theses. 1980.
https://scholarsmine.mst.edu/masters_theses/1980