Design and implementation of a FPGA based systolic processor for compressed images
Electrical and Computer Engineering
M.S. in Electrical Engineering
University of Missouri--Rolla
ix, 63 pages
© 2000 Balakrishnan Venkatasamy Subbulakshmi, All rights reserved.
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Full-text not available: Request this publication directly from Missouri S&T Library or contact your local library.http://laurel.lso.missouri.edu/record=b4498585~S5
Venkatasamy Subbulakshmi, Balakrishnan, "Design and implementation of a FPGA based systolic processor for compressed images" (2000). Masters Theses. 1962.
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