Multi-Objective Inverse Optimization of High-Speed Interconnects using Cascaded Deep Neural Network

Author

Yicheng Zhang
Ling Zhang
Hyunwook Park
Bo Pu
Xiao Ding Cai
Chulsoon Hwang, Missouri University of Science and TechnologyFollow
Bidyut Sen
Jun Fan, Missouri University of Science and TechnologyFollow
Er Ping Li
James L. Drewniak, Missouri University of Science and TechnologyFollow

Abstract

This paper proposes a novel multi-objective inverse optimization method for high-speed interconnects based on a cascaded deep neural network (DNN) structure, which can efficiently optimize characteristic impedance, insertion loss, and far-end crosstalk (FEXT) simultaneously. Parameter optimization for high-speed interconnects is essential to the signal integrity and electrical performance of complex designs such as multilayer printed circuit boards (PCBs) and chiplets. Conventional optimization approaches often rely on numerous optimization iterations, which is highly time-consuming, especially in high dimensional parameter spaces. This paper proposes a novel DNN based method by cascading an inverse-prediction network and a forward-prediction network to achieve multi-objective optimization for characteristic impedance, insertion loss, and FEXT by optimizing the trace width, trace spacing, and pair-to-pair distance. Further, by incorporating an integer programming technique, parameter optimization of multilayer PCBs, including the PCB stack up and design parameters of each signal layer, can be accomplished in seconds, much more efficiently than the conventional optimization approaches.

Recommended Citation

Y. Zhang and L. Zhang and H. Park and B. Pu and X. D. Cai and C. Hwang and B. Sen and J. Fan and E. P. Li and J. L. Drewniak, "Multi-Objective Inverse Optimization of High-Speed Interconnects using Cascaded Deep Neural Network," IEEE International Symposium on Electromagnetic Compatibility, pp. 120 - 125, Institute of Electrical and Electronics Engineers, Jan 2025.

The definitive version is available at https://doi.org/10.1109/EMCSIPI52291.2025.11170149

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

Deep neural network; high-speed interconnects; machine learning; multi-objective optimization; PCB stack-up

International Standard Serial Number (ISSN)

2158-1118; 1077-4076

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2025 Institute of Electrical and Electronics Engineers, All rights reserved.

Publication Date

01 Jan 2025