A CMOS Neural Oscillator Using Negative Resistance

Author

Hau Jung Song
John G. Harris, Missouri University of Science and TechnologyFollow

Abstract

A CMOS neural oscillator using negative resistance has been designed and fabricated in an AMI 0.5um double poly technology through MOSIS. The proposed neural oscillator consists of a nonlinear resistor with negative resistance as well as standard OTAs and capacitors. Simulations of a network of oscillators demonstrate cooperative computation. Measurements of the fabricated oscillator chip confirm the input-gated oscillatory behavior of the cell.

Recommended Citation

H. J. Song and J. G. Harris, "A CMOS Neural Oscillator Using Negative Resistance," Proceedings IEEE International Symposium on Circuits and Systems, vol. 3, pp. III152 - III155, Institute of Electrical and Electronics Engineers, Jul 2003.

Department(s)

Electrical and Computer Engineering

International Standard Serial Number (ISSN)

0271-4310

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2025 Institute of Electrical and Electronics Engineers, All rights reserved.

Publication Date

14 Jul 2003