Abstract
Crosstalk among vias is a critical problem in highspeed digital circuits, deteriorating signal quality and increasing jitter, especially when circuit density is high. Underlying mechanism of crosstalk among vias is investigated in this paper. using a physics-Based equivalent circuit model, crosstalk as a function of various geometrical parameters, including parallel plane pair thickness, layer count in printed circuit board (PCB) stack up, ground via patterns, and parallel plane pair dimensions, has been investigated. a multi-step crosstalk evaluation procedure is proposed based on the study for PCB layout-design verifications. © 2009 IEEE.
Recommended Citation
S. Wu and J. Fan, "Investigation of Crosstalk among Vias," IEEE International Symposium on Electromagnetic Compatibility, pp. 186 - 190, article no. 5284637, Institute of Electrical and Electronics Engineers, Dec 2009.
The definitive version is available at https://doi.org/10.1109/ISEMC.2009.5284637
Department(s)
Electrical and Computer Engineering
International Standard Book Number (ISBN)
978-142444267-6
International Standard Serial Number (ISSN)
1077-4076
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.
Publication Date
01 Dec 2009
