Study of TDR Impedance for Better Analysis to Measurement Correlation

Abstract

SI engineers usually build PCB test coupons and perform cross-sectioning and material properties extraction, and then do design optimization. But designing transmission lines on PCB with good analysis to measurement correlation is really challenging. Although there are some systematic approaches which can be applied to a broad range of applications for highspeed digital designs, it is found that in the validation process, there is always several-ohm mismatch in the comparison of TDR impedance between simulated and measurement results. This degrades engineers' confidence about high-speed design. Taking a real case as an example, this paper is trying to analyze which factors have influence on the trace impedance correlation and showing step by step how the agreement can be improved.

Meeting Name

2019 Joint International Symposium on Electromagnetic Compatibility, Sapporo and Asia-Pacific International Symposium on Electromagnetic Compatibility, EMC Sapporo/APEMC 2019 (2019:Jun. 3-7, Sapporo, Japan)

Department(s)

Electrical and Computer Engineering

Research Center/Lab(s)

Electromagnetic Compatibility (EMC) Laboratory

Comments

This work was supported by Intel Corporation, Oregon, USA

Keywords and Phrases

Analysis to Measurement Correlation; Cross-Section; Etch Factor; Resin Pocket; Surface Roughness; TDR Impedance; Transmission Line

International Standard Book Number (ISBN)

978-488552322-9

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2019 The Institute of Electronics, Information and Communication Engineer, All rights reserved.

Publication Date

01 Jun 2019

Link to Full Text

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