A Novel System-Level Power Integrity Transient Analysis Methodology using Simplified CPM Model, Physics-Based Equivalent Circuit PDN Model and Small Signal VRM Model
Abstract
The goal of a well-designed power delivery network (PDN) is to deliver desired voltage level from the source to destination, in other words, to minimize voltage noise and errors delivered to chip. This paper provides power integrity engineers a guideline to model PDN agilely in a simplified method and choose specific voltage regulator module model under specific circumstances. These comparisons and studies present the advantage of this novel methodology using equivalent circuit model for system level power integrity transient analysis.
Recommended Citation
J. Xu et al., "A Novel System-Level Power Integrity Transient Analysis Methodology using Simplified CPM Model, Physics-Based Equivalent Circuit PDN Model and Small Signal VRM Model," Proceedings of the 2019 IEEE International Symposium on Electromagnetic Compatibility, Signal and Power Integrity (2019, New Orleans, LA), pp. 205 - 210, Institute of Electrical and Electronics Engineers (IEEE), Jul 2019.
The definitive version is available at https://doi.org/10.1109/ISEMC.2019.8825256
Meeting Name
2019 IEEE International Symposium on Electromagnetic Compatibility, Signal and Power Integrity, EMC+SIPI 2019 (2019: Jul. 22-26, New Orleans, LA)
Department(s)
Electrical and Computer Engineering
Research Center/Lab(s)
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
Chip Power Model; CPM; PCB; PDN; PI; PI Transient; Power Delivery Network; Power Integrity; VRM
International Standard Book Number (ISBN)
978-153869199-1
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2019 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
01 Jul 2019
