System-Level Design for ESD Protection on Multiple IO Interfaces
Abstract
This paper introduces the application of system-efficient ESD design (SEED) to ESD-induced pulses that are typical for system-level ESD. Emphasis is given to USB connectors because it has been shown that discharges to the connector shell will not lead to damaging current levels; however, the current levels are sufficient to cause soft-failures and possibly lead to latch-up of the USB IC.
Recommended Citation
P. Wei et al., "System-Level Design for ESD Protection on Multiple IO Interfaces," Proceedings of the 2018 IEEE International Reliability Physics Symposium (2018, Burlingame, CA), pp. 2C.1-1 - 2C.1-8, Institute of Electrical and Electronics Engineers (IEEE), Mar 2018.
The definitive version is available at https://doi.org/10.1109/IRPS.2018.8353547
Meeting Name
2018 IEEE International Reliability Physics Symposium, 2018 IRPS (2018: Mar. 11-15, Burlingame, CA)
Department(s)
Electrical and Computer Engineering
Keywords and Phrases
SPICE; Electro-Static Discharge (ESD); Snapback; SPICE modeling; System-efficient ESD design (SEED); Transient voltage suppressors (TVS); Electrostatic devices; Electrostatic discharge (ESD)
International Standard Book Number (ISBN)
978-1-5386-5479-8
International Standard Serial Number (ISSN)
1541-7026
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2018 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
01 Mar 2018
