Estimating the Via-Plane Capacitance for Differential VIAS with Shared-Antipad Based on Analytical Equations

Abstract

Shared-antipad via structure is commonly used for high-speed printed circuit board (PCB) design. Therefore, an accurate via-plane capacitance evaluation for this kind of geometry is critical to facilitate engineering design. In this paper, the analytical equation of via-plane capacitance for separated-antipad via structure is extended to the shared-antipad via structure case, by using the equivalent area of antipad and ratio revision method. The proposed method is validated with numerical methods in HFSS for a typical structure widely used in practical high-speed PCB design.

Meeting Name

2017 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (2017: Aug. 7-11, Washington, DC)

Department(s)

Electrical and Computer Engineering

Research Center/Lab(s)

Electromagnetic Compatibility (EMC) Laboratory

Sponsor(s)

Cisco Systems, Inc.
National Science Foundation (U.S.)

Comments

The paper is based on the project sponsored by Cisco Systems, Inc. and by the National Science Foundation (NSF) under Grants IIP-1440110.

Keywords and Phrases

Capacitance; Electromagnetic compatibility; Numerical methods; Printed circuit boards; Printed circuit design; Analytical equations; Engineering design; High-speed channels; PCB design; Printed circuit board designs; Typical structures; Via modeling; Via-barrel capacitances; Structural design; Physic-based via model; Separated-antipad via structure; Via-plane capacitance

International Standard Book Number (ISBN)

978-1-5386-2229-2

International Standard Serial Number (ISSN)

1077-4076; 2158-1118

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2017 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Aug 2017

Link to Full Text

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