MPIE-Based Circuit Extraction Technique and Its Applications on Power Bus Modeling in High-Speed Digital Designs
Power bus design is a critical aspect in high-speed digital circuit designs. A circuit extraction approach based on a mixed-potential integral equation is presented to model arbitrary multilayer power bus structures including vertical discontinuities associated with surface mount (SMT) decoupling capacitor interconnects. The agreement of modeling and measurements demonstrates its effectiveness and utilization in power bus designs.
J. Fan et al., "MPIE-Based Circuit Extraction Technique and Its Applications on Power Bus Modeling in High-Speed Digital Designs," Proceedings of the 16th Annual Review of Progress in Applied Computational Electromagnetics (2000, Monterey, CA), vol. 1, pp. 130-137, Applied Computational Electromagnetics Society (ACES), Mar 2000.
16th Annual Review of Progress in Applied Computational Electromagnetics (2000: Mar. 20-24, Monterey, CA)
Electrical and Computer Engineering
The Applied Computational Electromagnetics Society; Naval Postgraduate University; Penn State University; Utah State University
Keywords and Phrases
Electromagnetic Wave Interference; Integral Equations; Surface Mount Technology; Circuit Extraction Techniques; Power Bus Designs; Digital Circuits
Article - Conference proceedings
© 2000 Applied Computational Electromagnetics Society (ACES), All rights reserved.
01 Mar 2000