MPIE-Based Circuit Extraction Technique and Its Applications on Power Bus Modeling in High-Speed Digital Designs

Abstract

Power bus design is a critical aspect in high-speed digital circuit designs. A circuit extraction approach based on a mixed-potential integral equation is presented to model arbitrary multilayer power bus structures including vertical discontinuities associated with surface mount (SMT) decoupling capacitor interconnects. The agreement of modeling and measurements demonstrates its effectiveness and utilization in power bus designs.

Meeting Name

16th Annual Review of Progress in Applied Computational Electromagnetics (2000: Mar. 20-24, Monterey, CA)

Department(s)

Electrical and Computer Engineering

Sponsor(s)

The Applied Computational Electromagnetics Society; Naval Postgraduate University; Penn State University; Utah State University

Keywords and Phrases

Electromagnetic Wave Interference; Integral Equations; Surface Mount Technology; Circuit Extraction Techniques; Power Bus Designs; Digital Circuits

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2000 Applied Computational Electromagnetics Society (ACES), All rights reserved.

Publication Date

01 Mar 2000

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