Modeling of Noise Coupling inside Multilayer Printed Circuit Boards using Cavity Model and Segmentation Technique

Abstract

The power distribution network in a printed circuit board (PCB) is an effective path for high-speed digital noise. The noise can be coupled by overlapping power/ground areas or by vias passing through them. This paper details a modeling approach and applies it to a multilayer PCB with six power/ground planes. The multilayer power/ground plane structure is modeled using the cavity model combined with segmentation method, and the vias are modeled using a via-plate capacitance model. This model requires considerably less time, and the results closely match those of full-wave simulations.

Meeting Name

Asia-Pacific Symposium on Electromagnetic Compatibility (2010: Apr. 12-16, Beijing, China)

Department(s)

Electrical and Computer Engineering

Research Center/Lab(s)

Electromagnetic Compatibility (EMC) Laboratory

Keywords and Phrases

Capacitance Model; Cavity Model; Digital Noise; Full-Wave Simulations; High-Speed; Modeling Approach; Multilayer Printed Circuit Board; Noise Coupling; Power Distribution Network; Segmentation Methods; Segmentation Techniques; Computer Simulation; Distributed Parameter Networks; Electromagnetic Compatibility; Electromagnetism; Multilayers; Printed Circuit Manufacture; Printed Circuit Boards

International Standard Book Number (ISBN)

978-1424456215; 978-1424456239

International Standard Serial Number (ISSN)

2162-7673

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2010 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Apr 2010

Link to Full Text

Share

 
COinS