Investigation of the ESD Induced Clock Disturbances in Portable Electronic Products

Abstract

ESD events can induce noise on the system clock which may lead to soft-errors in the portable electronic products. This paper presents measurement techniques to investigate the ESD induced clock disturbances. At first, the soft-errors due to system level ESD testing on a DUT are shown. Next, local field scanning and direct injection are performed to identify ESD sensitive areas/traces. Techniques for soft-error threshold measurement using synchronized noise injection techniques are shown. Short time FFT (STFFT) based spectrogram method to investigate the PLL output frequency deviation due to the clock line noise, is presented.

Meeting Name

2013 IEEE International Symposium on Electromagnetic Compatibility (2013: Aug. 5-9, Denver, CO)

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

Measurement Techniques; Noise Injection; Output Frequency; Portable Electronics; Sensitive Area; System Clock; System-level ESD; Threshold Measurements; Clocks; Electromagnetic Compatibility; Electrostatic Discharge; Errors; Electrostatic Devices

International Standard Book Number (ISBN)

978-1-4799-0408-2

International Standard Serial Number (ISSN)

2158-110X

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2013 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Aug 2013

Link to Full Text

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