Modeling Optimization of Test Patterns used in De-Embedding Method for Through Silicon Via (TSV) Measurement in Silicon Interposer

Abstract

In this paper, the electrical performance of the test patterns used in the de-embedding method for TSV characterization was studied thoroughly. For all test patterns, full wave models were built and then analyzed based on simulated electrical performances. Equivalent circuit model analysis and parametric study results of the test patterns further demonstrate the accuracy of the full wave models. Furthermore, Scanning Electron Microscopy (SEM) measurements were taken for all the test patterns, and full wave models were optimized based on the measured dimensions. Finally, the response of the TSV pair was obtained by de-embedding the pads and traces from the TSV pair simulation with the test fixtures. Good agreement between the de-embedded results with analytical characterization and the full-wave simulation for a single TSV pair was achieved.

Meeting Name

2016 IEEE International Symposium on Electromagnetic Compatibility, EMC 2016 (2016: Jul. 25-29, Ottawa, Canada)

Department(s)

Electrical and Computer Engineering

Research Center/Lab(s)

Center for High Performance Computing Research

Second Research Center/Lab

Electromagnetic Compatibility (EMC) Laboratory

Keywords and Phrases

Electric network analysis; Electromagnetic compatibility; Electronics packaging; Equivalent circuits; Integrated circuit manufacture; Optimization; Reconfigurable hardware; Scanning electron microscopy; Analytical characterization; De-embedding; Electrical performance; Equivalent circuit model; Full waves; Full-wave simulations; Silicon interposers; Through-Silicon-Via (TSV); Three dimensional integrated circuits; analytical solution; circuit analysis; SEM measurement

International Standard Book Number (ISBN)

978-150901441-5

International Standard Serial Number (ISSN)

1077-4076

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2016 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Sep 2016

Link to Full Text

Share

 
COinS