Analytical Evaluation of Scattering Parameters for Equivalent Circuit of through Silicon Via Array

Abstract

The high level of integration in digital electronic chips based on threedimensional (3D) technology requires accurate modelling of the vertical interconnects (the through silicon vias - TSVs). An accurate prediction of the signal propagation and crosstalk of the TSVs cannot be based on the single via since the interaction among adjacent TSVs in a high density array cannot be neglected. An algorithm is proposed that extends the approach for modelling a TSV array with a complete analytical evaluation of the final multiport scattering parameter matrix, thus making the electromagnetic modelling of such structures more efficient without relying on commercial circuit solvers. The proposed method requires much less processing time with respect to commercial solvers with a comparable accuracy.

Department(s)

Electrical and Computer Engineering

Research Center/Lab(s)

Center for High Performance Computing Research

Second Research Center/Lab

Electromagnetic Compatibility (EMC) Laboratory

Keywords and Phrases

Electronics packaging; Integrated circuit interconnects; Integrated circuit manufacture; Parameter estimation; Scattering parameters; Accurate prediction; Analytical evaluation; Digital electronics; Electromagnetic modelling; High-density arrays; Level of integrations; Through silicon vias; Through-Silicon-Via; Three dimensional integrated circuits

International Standard Serial Number (ISSN)

0013-5194

Document Type

Article - Journal

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2015 Institution of Engineering and Technology (IEE), All rights reserved.

Publication Date

01 Jun 2015

Link to Full Text

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