Abstract
Application of a circuit extraction approach based on a mixed-potential integral equation formulation (CEMPIE) for dc power-bus modeling in high-speed digital designs is detailed herein. Agreement with measurements demonstrates the effectiveness of the approach. Dielectric losses are included into the calculation of Green's functions, and thus, incorporated into the rigorous first principles formulation. A SPICE model is then extracted from the discretized integral equation. A quasistatic approximation is used for Green's functions to keep the extracted circuit elements frequency independent. Previous work has established a necessary meshing criterion in order to ensure accuracy for a given substrate thickness and dielectric constant to a desired frequency. Several power-bus design issues, such as surface mount decoupling and power-plane segmentation, were investigated using the modeling approach. The results and discussions illustrate the application of the method to dc power-bus design for printed circuit and multi-chip module substrates.
Recommended Citation
J. Fan et al., "DC Power-Bus Modeling and Design with a Mixed-Potential Integral-Equation Formulation and Circuit Extraction," IEEE Transactions on Electromagnetic Compatibility, vol. 43, no. 4, pp. 426 - 436, Institute of Electrical and Electronics Engineers (IEEE), Nov 2001.
The definitive version is available at https://doi.org/10.1109/15.974622
Department(s)
Electrical and Computer Engineering
Research Center/Lab(s)
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
DC Power-Bus Design; DC Power-Bus Modeling; Green's Function Methods; Green's Functions; SPICE; SPICE Model; Approximation Theory; Circuit CAD; Circuit Extraction; Dielectric Constant; Dielectric Losses; Digital Circuits; Frequency Independent Circuit Elements; High-Speed Digital Design; Integral Equations; Mixed-Potential Integral-Equation; Multichip Module Substrates; Multichip Modules; Necessary Meshing Criterion; Power-Plane Segmentation; Printed Circuit Design; Quasistatic Approximation; Substrate Thickness; Surface Mount Decoupling; Segmented Power Plane
International Standard Serial Number (ISSN)
0018-9375; 1558-187X
Document Type
Article - Journal
Document Version
Final Version
File Type
text
Language(s)
English
Rights
© 2001 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
01 Nov 2001
