Masters Theses

Jun Xu

Keywords and Phrases

CPM; PDN; PI; Power delivery network; Power integrity; Via

Abstract

"With decreasing supply voltage level and massive demanding current on system chipset, power integrity design becomes more and more critical for system stability. The ultimate goal of well-designed power delivery network (PDN) is to deliver desired voltage level from the source to destination, in other words, to minimize voltage noise delivered to digital devices. The thesis is composed of three parts. The first part focuses on-die level power models including simplified chip power model (CPM) for system level analysis and the worst scenario current profile. The second part of this work introduces the physics-based equivalent circuit model to simplify the passive PDN model to RLC circuit netlist, to be compatible with any spice simulators and tremendously boost simulation speed. Then a novel system/chip level end-to-end transient model is proposed, including the die model and passive PDN model discussed in previous two chapters as well as a SIMPLIS based small signal VRM model. In the last part of the thesis, how to model voltage regulator module (VRM) is explicitly discussed. Different linear approximated VRM modeling approaches have been compared with the SIMPLIS small signal VRM model in both frequency domain and time domain. The comparison provides PI engineers a guideline to choose specific VRM model under specific circumstances. Finally yet importantly, a PDN optimization example was given. Other than previous PDN optimization approaches, a novel hybrid target impedance concept was proposed in this thesis, in order to improve system level PDN optimization process"--Abstract, page iv.

Advisor(s)

Fan, Jun, 1971-

Committee Member(s)

Drewniak, James L.
Hwang, Chulsoon

Department(s)

Electrical and Computer Engineering

Degree Name

M.S. in Electrical Engineering

Publisher

Missouri University of Science and Technology

Publication Date

Fall 2018

Journal article titles appearing in thesis/dissertation

  • System level power integrity transient analysis using physics-based approach
  • A survey on modeling strategies for high-speed differential via between two parallel plates
  • Application of deep learning for high-speed differential via TDR impedance fast prediction

Pagination

xiv, 85 pages

Note about bibliography

Includes bibliographical references.

Rights

© 2018 Jun Xu, All rights reserved.

Document Type

Thesis - Open Access

File Type

text

Language

English

Thesis Number

T 11452

Electronic OCLC #

1084481941

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