Masters Theses
Keywords and Phrases
De-Embedding; Embedded Multi-Die Interconnect Bridge; High Speed Design; Signal Integrity; Silicon Interposer Technology; Through Silicon Via
Abstract
"Traditional two-dimensional system-in-package (2D SiP) can no longer support the scaling of size, power, bandwidth, and cost at the same rate required by Moore's Law. Three-dimensional integrated circuits (3D-ICs), 2.5D silicon interposer technology in which through silicon vias are widely used, are implemented to meet these challenges. Embedded multi-die interconnect bridge (EMIB) technology are proposed as well.
In Section 1, a novel de-embedding method is proposed for TSV characterization by using a set of simple yet efficient test patterns. Full wave models and corresponding equivalent circuits are provided to explain the electrical performance of the test patterns clearly. Furthermore, broadband measurement is performed for all test patterns up to 40 GHz, to verify the accuracy of the developed full wave models. Scanning Electron Microscopy (SEM) measurements are taken for all the test patterns to optimize the full wave models. Finally, the proposed de-embedding method is applied to extract the response of the TSV pair. Good agreement between the de-embedded results with analytical characterization and the full-wave simulation for a single TSV pair indicates that the proposed de-embedding method works effectively up to 40 GHz.
In Section 2, the signal integrity performance of EMIB technology is evaluated and compared with silicon interposer technology. Two examples are available for each technology, one is simple with only one single trace pair considered; the other is complex with three differential pairs considered in the full wave simulation. Results of insertion loss, return loss, crosstalk and eye diagram are provided as criteria to evaluate the signal integrity performance for both technologies. This work provides guidelines to both top-level decision and specific IC or channel design"--Abstract, page iii.
Advisor(s)
Fan, Jun, 1971-
Committee Member(s)
Achkir, Brice
Beetner, Daryl G.
Pommerenke, David
Drewniak, James L.
Department(s)
Electrical and Computer Engineering
Degree Name
M.S. in Electrical Engineering
Publisher
Missouri University of Science and Technology
Publication Date
Summer 2016
Pagination
ix, 62 pages
Note about bibliography
Includes bibliographical references (pages 58-61).
Rights
© 2016 Qian Wang, All rights reserved.
Document Type
Thesis - Open Access
File Type
text
Language
English
Subject Headings
Three-dimensional integrated circuitsInterconnects (Integrated circuit technology) -- Design and constructionEmbedded computer systemsSystems on a chip
Thesis Number
T 10987
Electronic OCLC #
958294069
Recommended Citation
Wang, Qian, "De-embedding method for electrical response extraction of through-silicon via (TSV) in silicon interposer technology and signal integrity performance comparison with embedded multi-die interconnect bridge (EMIB) technology" (2016). Masters Theses. 7574.
https://scholarsmine.mst.edu/masters_theses/7574