Masters Theses

Abstract

"As the asynchronous sequential circuit has become more and more important to digital systems in recent years high reliability and simple maintenance of the circuit is stressed. This paper presents a fault-detection algorithm which will be applicable to most of the practical asynchronous sequential circuits. The asynchronous sequential circuit is treated from the combinatoric point of view. First the minimal set of states, both stable states and unstable states, sufficient to detect all possible faults of the circuit is found from the fault table. Then a test sequence is generated to go through these states. It is assumed that testing outputs can be added. Simple and systematic techniques are also presented for the construction of fault table and the generation of test sequence. The usefulness of this algorithm increases as the density of the stable states associated with the circuit increases"--Abstract, page ii.

Advisor(s)

Tracey, James H.

Committee Member(s)

Taylor, J. M.
Hatfield, Charles, 1920-1993

Department(s)

Electrical and Computer Engineering

Degree Name

M.S. in Electrical Engineering

Publisher

University of Missouri--Rolla

Publication Date

1970

Pagination

v, 43 pages

Note about bibliography

Includes bibliographical references (pages 118-121).

Rights

© 1970 Jeng-Chuan Kau, All rights reserved.

Document Type

Thesis - Open Access

File Type

text

Language

English

Subject Headings

Asynchronous circuits -- Testing
Sequential circuits
Electronic circuits -- Testing

Thesis Number

T 2530

Print OCLC #

6032874

Electronic OCLC #

872571294

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