Masters Theses
Abstract
"This paper presents an algorithm for deriving an optimum test sequence for detecting faults in a synchronous machine. In this study, the flow table is used as a tool to generate the fault detection tests. The fault stuck-at-1 (or stuck-at-0 ) is said to be present when a permanent signal valued 1 (or 0) appears on a component of the machine. Only single faults are treated . The result of the procedure is one or more test sequences guaranteed to detect a set of faults (Fp). First, sequential machines with feedback lines as memory elements are considered . Then the memory elements are changed to R-S flip-flops. Finally, several suggestions for further work are made"--Abstract, Page ii.
Advisor(s)
Szygenda, Stephen A.
Committee Member(s)
Tracey, James H.
Ho, C. Y. (Chung You), 1933-1988
Department(s)
Electrical and Computer Engineering
Degree Name
M.S. in Electrical Engineering
Publisher
University of Missouri--Rolla
Publication Date
1970
Pagination
viii, 62 Pages
Note about bibliography
Includes bibliographical references (page 26).
Rights
© 1970 Chung-tao David Wang, All rights reserved.
Document Type
Thesis - Open Access
File Type
text
Language
English
Subject Headings
Electronic digital computersSequential machine theoryFault-tolerant computing
Thesis Number
T 2325
Print OCLC #
6013560
Electronic OCLC #
844781067
Recommended Citation
Wang, Chung-Tao David, "Fault detection on sequential machines" (1970). Masters Theses. 7063.
https://scholarsmine.mst.edu/masters_theses/7063