Masters Theses
Abstract
"One step in the synthesis procedure for realizing an asynchronous sequential circuit that is operating in fundamental mode is to obtain an internal-state assignment that will realize the operations of the circuit. Often the procedures that are used in accomplishing the above task generate several satisfactory assignments. The first part of this paper presents a method that will enable one to predict which of the internal-state assignments will yield a simpler set of next-state expressions. A second topic treated in this paper is one of presenting a method to generate the next-state expressions for an asynchronous sequential circuit directly from the internal-state assignment. An algorithm is presented for generating the next-state expressions without construction of the transition table"--Abstract, page ii.
Advisor(s)
Tracey, James H.
Committee Member(s)
Kern, Frank J.
Chenoweth, Robert Dean
Pagano, Sylvester J., 1924-2006
Department(s)
Electrical and Computer Engineering
Degree Name
M.S. in Electrical Engineering
Publisher
University of Missouri at Rolla
Publication Date
1967
Pagination
iv, 39 pages
Note about bibliography
Includes bibliographical references (pages 104-105).
Rights
© 1967 Gary K. Maki, All rights reserved.
Document Type
Thesis - Open Access
File Type
text
Language
English
Subject Headings
Asynchronous circuitsElectronic circuit designSequential circuits
Thesis Number
T 2008
Print OCLC #
5987452
Electronic OCLC #
793401052
Recommended Citation
Maki, Gary Keith, "Minimization and generation of next-state expressions for asynchronous sequential circuits" (1967). Masters Theses. 6869.
https://scholarsmine.mst.edu/masters_theses/6869