A programmed synthesis procedure for asynchronous sequential circuits

Author

Robert Judson Smith

Abstract

"The synthesis procedure for large asynchronous normal fundamental-mode sequential circuits is time-consuming and tedious when performed manually. This paper describes a series of computer programs which, given a machine specification in flow table form, automatically produces simplified normal form implementation design equations. The user may specify that either minimum-variable state assignments, or more rapidly generated near-minimum-variable codes be found. Next-state equations are formed using the generated state assignments and converted to simplified sums of products. Sample machines having flow tables of up to eighteen rows by four columns are synthesized"--Abstract, page ii.

Advisor(s)

Tracey, James H.

Committee Member(s)

Kern, Frank J.
Gillett, Billy E.

Department(s)

Electrical and Computer Engineering

Degree Name

M.S. in Electrical Engineering

Publisher

University of Missouri at Rolla

Publication Date

1967

Pagination

v, 86 pages

Rights

© 1967 Robert J. Smith, All rights reserved.

Document Type

Thesis - Open Access

File Type

text

Language

English

Subject Headings

Asynchronous circuits -- Computer-aided designSequential circuits

Thesis Number

T 2059

Print OCLC #

5994336

Electronic OCLC #

793357399

Recommended Citation

Smith, Robert Judson, "A programmed synthesis procedure for asynchronous sequential circuits" (1967). Masters Theses. 6812.
https://scholarsmine.mst.edu/masters_theses/6812