Microcontroller ESD immunity test and on-chip power distribution network analysis

Author

Lijun Han

Keywords and Phrases

Electrical fast transient (EFT); PSpice simulation

Abstract

"Current semiconductor process technology makes the microcontroller sensitive to fast rise time transients. To ensure transient immunity in the design stage, there is significant interest in understanding the failure mechanisms of the microcontroller to electrostatic discharge (ESD) or electrical fast transient (EFT) events. This thesis documents the immunity test performed on an 8-bit microcontroller. The test was conducted by injecting transient currents onto the package pins through a capacitive probe. The procedure used to detect soft errors is described and corresponding test results of the microcontroller reactions to transients with different rise times and polarities are reported, which includes three highly sensitive pins, general I/O pins and power/ground pins"--Abstract, page iii.

Advisor(s)

Pommerenke, David

Committee Member(s)

Beetner, Daryl G.
Drewniak, James L.

Department(s)

Electrical and Computer Engineering

Degree Name

M.S. in Electrical Engineering

Publisher

University of Missouri--Rolla

Publication Date

Fall 2007

Journal article titles appearing in thesis/dissertation

• Experimental investigation of the ESD sensitivity of an 8-bit microcontroller
• ESD induced noise coupling and IC PDN modeling

Pagination

xi, 78 pages

Rights

© 2007 Lijun Han, All rights reserved.

Document Type

Thesis - Citation

File Type

text

Language

English

Subject Headings

Electric discharges -- DetectionElectric power distributionMicrocontrollers

Thesis Number

T 9251

Print OCLC #

236167944

Recommended Citation

Han, Lijun, "Microcontroller ESD immunity test and on-chip power distribution network analysis" (2007). Masters Theses. 5956.
https://scholarsmine.mst.edu/masters_theses/5956