Masters Theses
Abstract
"This thesis describes the Field Programmable Gate Array (FPGA) implementations of two powerful techniques of Computational Intelligence (CI), the Particle Swarm Optimization algorithm (PSO) and the Neural Network (NN). Particle Swarm Optimization (PSO) is a popular population-based optimization algorithm. While PSO has been shown to perform well in a large variety of problems, PSO is typically implemented in software. Population-based optimization algorithms such as PSO are well suited for execution in parallel stages. This allows PSO to be implemented directly in hardware and achieve much faster execution times than possible in software. In this thesis, a pipelined architecture for hardware PSO implementation is presented. Benchmark functions solved by software and FPGA hardware PSO implementations are compared. NNs are inherently parallel, with each layer of neurons processing incoming data independently of each other. While general purpose processors have reached impressive processing speeds, they still cannot fully exploit this inherent parallelism due to their sequential architecture. In order to achieve the high neural network throughput needed for real-time applications, a custom hardware design is needed. In this thesis, a digital implementation of an NN is developed for FPGA implementation. The hardware PSO implementation is designed using only VHDL, while the NN hardware implementation is designed using Xilinx System Generator. Both designs are synthesized using Xilinx ISE and implemented on the Xilinx Virtex-II Pro FPGA Development Kit"--Abstract, page iii.
Advisor(s)
Venayagamoorthy, Ganesh K.
Committee Member(s)
Zawodniok, Maciej Jan, 1975-
Al-Assadi, Waleed K.
Department(s)
Electrical and Computer Engineering
Degree Name
M.S. in Computer Engineering
Sponsor(s)
United States. Department of Education. Graduate Assistance in Areas of National Need
Publisher
Missouri University of Science and Technology
Publication Date
Spring 2010
Pagination
ix, 79 pages
Note about bibliography
Includes bibliographical references (pages 48-50).
Rights
© 2010 Parviz Michael Palangpour, All rights reserved.
Document Type
Thesis - Open Access
File Type
text
Language
English
Subject Headings
Field programmable gate arraysMathematical optimizationNeural networks (Computer science)Swarm intelligence -- Mathematical models
Thesis Number
T 9624
Print OCLC #
678605233
Electronic OCLC #
608318800
Recommended Citation
Palangpour, Parviz, "FPGA implementation of PSO algorithm and neural networks" (2010). Masters Theses. 4759.
https://scholarsmine.mst.edu/masters_theses/4759