Masters Theses
Abstract
"This thesis presents modeling approaches for fast calculation of signals in dense via arrays in high speed printed circuit boards (PCBs) and model to hardware correlation study of solid and perforated disk resonators. A 2D finite difference (FD) method to extract the via capacitance which includes the via pad capacitance obtained by solving the laplace equation in the via domain in multi-layer geometries is presented and validated with analytical formulation for via capacitance. Next, closed-form expression for the impedance of an infinitely large parallel plane pair is derived and validated by comparing with cavity model for several numerical examples. The infinitely large parallel plane pair model is applicable to practical printed circuit board (PCB) design problems where there are multiple shorting vias around the signal vias of interest. With the presence of multiple shorting vias, reflections from the plane pair edges can be neglected since the shorting vias prevent the electromagnetic energy from leaking away from the local cavity around the signal vias. Next, improved multiple scattering method for fast calculation of signals in via arrays in plane pair is derived using analytical expressions. Parallel plate modes expressed as cylindrical waves are excited by the magnetic frill currents in via holes (antipads). Multiple scattering of these modes among vias as well as from the edge boundaries of the plate pair are rigorously considered with the addition theorem of the cylindrical waves. In the final part of this thesis, different approaches mentioned here are applied to study solid and perforated disk resonator behaviors and to correlate the simulated and measured results"--Abstract, page iii.
Advisor(s)
Fan, Jun, 1971-
Committee Member(s)
Zhang, Yaojiang
Drewniak, James L.
Department(s)
Electrical and Computer Engineering
Degree Name
M.S. in Electrical Engineering
Publisher
Missouri University of Science and Technology
Publication Date
Fall 2009
Journal article titles appearing in thesis/dissertation
- 2D finite difference method to obtain the via capacitance
- Impedance of an infinitely large parallel plane pair and its applications in engineering modeling
- Multiple scattering method for analyzing via arrays in circular/irregular plane pair and its quantifaction with physics based circuit model
- Disk resonator study using boundary element method, multiple scattering method, and effective dielectric medium approach
Pagination
xii, 92 pages
Rights
© 2009 Arun Reddy Chada, All rights reserved.
Document Type
Thesis - Open Access
File Type
text
Language
English
Subject Headings
Printed circuits -- Design and construction -- Mathematical modelsSignal integrity (Electronics)
Thesis Number
T 9570
Print OCLC #
612357211
Electronic OCLC #
466182741
Recommended Citation
Chada, Arun Reddy, "Modeling of vias and via arrays in high speed printed circuit boards" (2009). Masters Theses. 4713.
https://scholarsmine.mst.edu/masters_theses/4713