Delay insensitive ternary logic (DITL)
Keywords and Phrases
NULL Convention Logic
"This thesis focuses on development of a Single Rail Ternary Voltage Delay-Insensitive paradigm called Delay-Insensitive Ternary Logic (DITL), which is based on NULL Convention Logic (NCL). Single rail asynchronous logic has potential advantages over Dual-Rail logic such as reduction of Power and Interconnect as well as Logic Area. The DITL concept is developed in steps of individual circuit components. These components are designed at the transistor level and are connected together to form a registered pipeline system. Some variations in pipeline design are also investigated"--Abstract, page iii.
Smith, Scott C.
Al-Assadi, Waleed K.
Beetner, Daryl G.
Electrical and Computer Engineering
M.S. in Computer Engineering
National Science Foundation (U.S.)
University of Missouri--Rolla
viii, 57 pages
© 2007 Ravi Sankar Parameswaran Nair, All rights reserved.
Thesis - Open Access
Library of Congress Subject Headings
Asynchronous circuits -- Design and construction
Electronic circuit design
Logic circuits -- Design and construction
Print OCLC #
Electronic OCLC #
Link to Catalog Record
Parameswaran Nair, Ravi Sankar, "Delay-insensitive ternary logic (DITL)" (2007). Masters Theses. 4568.