Masters Theses
Test generation for combinational logic circuits using information theory
Department(s)
Computer Science
Degree Name
M.S. in Computer Science
Publisher
University of Missouri--Rolla
Publication Date
Summer 1983
Pagination
viii, 72 pages
Rights
© 1983 Yusuf Murat Erten, All rights reserved.
Document Type
Thesis - Citation
File Type
text
Language
English
Thesis Number
T 4960
Print OCLC #
9926145
Recommended Citation
Erten, Yusuf Murat, "Test generation for combinational logic circuits using information theory" (1983). Masters Theses. 4079.
https://scholarsmine.mst.edu/masters_theses/4079
Share My Thesis If you are the author of this work and would like to grant permission to make it openly accessible to all, please click the button above.
