"The objective of this thesis is to explore a simple way to estimate the maximum power bus noise in printed circuit boards with power and ground planes. A one-dimensional lossy transmission line model and a single-mode cavity model are developed that provide relatively simple expressions for estimating the upper bound of the input impedance on a power bus. The derived closed-form expressions illustrate the effects that plane spacing, dielectric loss, and board dimensions have on the maximum power bus noise. The effectiveness of each method is evaluated for power bus structures with different plane spacings and dielectric losses"--Abstract, page iii.
Hubing, Todd H.
Van Doren, Thomas, 1940-
Weeks, William, IV
Electrical and Computer Engineering
M.S. in Electrical Engineering
University of Missouri--Rolla
ix, 49 pages
© 2002 Huihui Hu, All rights reserved.
Thesis - Restricted Access
Electronic circuits -- Noise
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Electronic access to the full-text of this document is restricted to Missouri S&T users. Otherwise, request this publication directly from Missouri S&T Library or contact your local library.http://merlin.lib.umsystem.edu/record=b4967941~S5
Hu, Huihui, "Estimating power bus noise in low-cost printed circuits boards" (2002). Masters Theses. 2223.
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