Masters Theses
Abstract
"The objective of this thesis is to explore a simple way to estimate the maximum power bus noise in printed circuit boards with power and ground planes. A one-dimensional lossy transmission line model and a single-mode cavity model are developed that provide relatively simple expressions for estimating the upper bound of the input impedance on a power bus. The derived closed-form expressions illustrate the effects that plane spacing, dielectric loss, and board dimensions have on the maximum power bus noise. The effectiveness of each method is evaluated for power bus structures with different plane spacings and dielectric losses"--Abstract, page iii.
Advisor(s)
Hubing, Todd H.
Committee Member(s)
Van Doren, Thomas, 1940-
Weeks, William, IV
Department(s)
Electrical and Computer Engineering
Degree Name
M.S. in Electrical Engineering
Publisher
University of Missouri--Rolla
Publication Date
Summer 2002
Pagination
ix, 49 pages
Note about bibliography
Includes bibliographical references (pages 47-48).
Rights
© 2002 Huihui Hu, All rights reserved.
Document Type
Thesis - Restricted Access
File Type
text
Language
English
Subject Headings
Electronic circuits -- Noise
Thesis Number
T 8105
Print OCLC #
52560843
Recommended Citation
Hu, Huihui, "Estimating power bus noise in low-cost printed circuits boards" (2002). Masters Theses. 2223.
https://scholarsmine.mst.edu/masters_theses/2223
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