Masters Theses
Design and implementation of boundary scan with built-in self-test for Xilinx's XC4000 Logic Cell Array Family of Field Programmable Gate Array
Department(s)
Electrical and Computer Engineering
Degree Name
M.S. in Electrical Engineering
Publisher
University of Missouri--Rolla
Publication Date
Fall 1994
Pagination
ix, 62 pages
Rights
© 1994 Chien-Yuh Lin, All rights reserved.
Document Type
Thesis - Citation
File Type
text
Language
English
Thesis Number
T 6882
Print OCLC #
32799256
Recommended Citation
Lin, Chien-Yuh, "Design and implementation of boundary scan with built-in self-test for Xilinx's XC4000 Logic Cell Array Family of Field Programmable Gate Array" (1994). Masters Theses. 1393.
https://scholarsmine.mst.edu/masters_theses/1393
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