Abstract

Power-return plane pairs in printed circuit boards are often modeled as resonant cavities. Cavity models can be used to calculate transfer impedance parameters used to predict levels of power bus noise. Techniques for applying the cavity model to lossy printed circuit board geometries rely on a low-loss assumption in their derivations. Boards that have been designed to damp power bus resonances (e.g., boards with embedded capacitance) generally violate this low-loss assumption. This paper investigates the validity of the cavity model when applied to printed circuit board structures where the board resonances are significantly damped. Cavity modeling results for sample lossy power-return plane structures are validated using a three-dimensional full wave numerical code. A simple method is also established to check the validity of the cavity model for a power-return plane structure with imperfect conductors and lossy dielectric substrates.

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

3D Full Wave Numerical Code; Capacitance; Cavity Model; Cavity Resonators; Conductive Loss; Damped Board Resonances; Dielectric Loss; Dielectric Losses; Embedded Capacitance; Equivalent Circuits; Imperfect Conductors; Lossy PCB Geometries; Lossy Dielectric Substrates; Lossy Power-Return Plane Structures; Model Validation; Modelling; Power Bus Impedance; Power Bus Modeling; Power Bus Noise; Power Bus Resonances; Printed Circuit Boards; Printed Circuits; Propagation Constant; Resonant Cavities; Surface Impedance; Transfer Impedance Parameters

International Standard Serial Number (ISSN)

1521-3323

Document Type

Article - Journal

Document Version

Final Version

File Type

text

Language(s)

English

Rights

© 2003 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Jan 2003

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