Abstract
A 26-layer printed circuit board including several test sites has been analyzed. All the sites have a transition from coupled microstrips to coupled striplines through signal vias. Differential measurements have been performed on some of these test sites to estimate the effect on S-parameters and eye diagrams due to via and antipad radius variation, and different lengths of via stub. The focus of this paper is on a test site with a transition from top to the sixth layer. At the same time, a physics based circuit model has been assembled in a spice-based simulation tool and a full-wave model has been generated as well. The paper will show that the process of modeling can require a series of adjustments to get reasonable results. A brief discussion about possible issues associated with fabrication tolerances is presented in the last chapter.
Recommended Citation
M. Cocchini et al., "Differential Vias Transition Modeling in a Multilayer Printed Circuit Board," Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (2008, Detroit, MI), Institute of Electrical and Electronics Engineers (IEEE), Aug 2008.
The definitive version is available at https://doi.org/10.1109/ISEMC.2008.4652164
Meeting Name
IEEE International Symposium on Electromagnetic Compatibility (2008: Aug. 18-22, Detroit, MI)
Department(s)
Electrical and Computer Engineering
Research Center/Lab(s)
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
Cavity Model; Differential Signal; Ground Vias; Noise Coupling; Signal Via Transition; Via Capacitance; Integrated Circuit Modeling; Frequency Measurement; Capacitance; Geometry; Transmission Line Measurements; Dielectric Measurements; Stripline; SPICE; Microstrip Circuits; Printed Circuit Testing; S-Parameters
International Standard Book Number (ISBN)
978-1424416998
International Standard Serial Number (ISSN)
2158-110X; 2158-1118
Document Type
Article - Conference proceedings
Document Version
Final Version
File Type
text
Language(s)
English
Rights
© 2008 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
01 Aug 2008