Abstract

Efficient power plane and stack up optimization is critical for Printed Circuit Board (PCB) Power Delivery Networks (PDNs), particularly in multi-power-domain designs with stringent DC Resistance (DCR) specifications. This work presents a novel reinforcement learning-based framework that assigns stack up layers for each power domain and iteratively refines power plane shapes to meet design constraints while ensuring non-overlapping layouts. The approach leverages Minimum Spanning Trees (MSTs) for initializing power plane shapes. It dynamically refines them using the A∗ (A-Star) algorithm with weighted pathfinding, ensuring optimal connectivity and compliance with DCR requirements. Tested extensively on multi-power-domain scenarios, the algorithm demonstrates robust performance and scalability, offering an unprecedented solution to power plane and stack up optimization challenges in PCB PDN design.

Department(s)

Electrical and Computer Engineering

Comments

National Science Foundation, Grant IIP-1916535

Keywords and Phrases

PDN optimization; power integrity; reinforcement learning; shape synthesis; stackup synthesis

International Standard Serial Number (ISSN)

2158-1118; 1077-4076

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2025 Institute of Electrical and Electronics Engineers, All rights reserved.

Publication Date

01 Jan 2025

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