Asynchronous Biphasic Pulse Signal Coding And Its CMOS Realization

Abstract

An asynchronous biphasic pulse train signal representation mechanism is proposed for low bandwidth, low power sensor applications. We prove that this novel pulse coding method provides lossless encoding theoretically. We also present a CMOS circuit realization using the AMI 0.6 μm process. Cadence simulation results show that the reconstructed signal has 8 effective bits of resolution with less than 100 μW of total power consumption. © 2006 IEEE.

Department(s)

Electrical and Computer Engineering

International Standard Book Number (ISBN)

978-078039390-5

International Standard Serial Number (ISSN)

0271-4310

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2025 Institute of Electrical and Electronics Engineers, All rights reserved.

Publication Date

01 Dec 2006

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