An Asynchronous Delta-sigma Converter Implementation
Abstract
In this paper an architecture, signal reconstruction algorithm and first-ever implementation of an asynchronous delta-sigma converter are presented. The signal reconstruction algorithm can mathematically perfectly reconstruct the original signal only using timing events. A prototype circuit designed and fabricated in a standard 0.5 μm CMOS process with a 5V power supply is presented. The tests show that an 8-bit resolution with 6kHz signal bandwidth and only 715 μm power consumption is possible. © 2006 IEEE.
Recommended Citation
D. Wei et al., "An Asynchronous Delta-sigma Converter Implementation," Proceedings IEEE International Symposium on Circuits and Systems, pp. 4903 - 4906, article no. 1693730, Institute of Electrical and Electronics Engineers, Dec 2006.
Department(s)
Electrical and Computer Engineering
International Standard Book Number (ISBN)
978-078039390-5
International Standard Serial Number (ISSN)
0271-4310
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2025 Institute of Electrical and Electronics Engineers, All rights reserved.
Publication Date
01 Dec 2006
