A Spiking Recurrent Neural Network
Abstract
A spiking recurrent neural network implementing an associative memory is proposed. The circuit including four integrate-and-fire (IF) and Willshaw-type binary synapses is designed with the AMI 0.5um CMOS process. A large-scale network is simulated with Matlab and its storage capacity is calculated and analyzed.
Recommended Citation
Y. Li and J. G. Harris, "A Spiking Recurrent Neural Network," Proceedings IEEE Computer Society Annual Symposium on VLSI Emerging Trends in VLSI Systems Design, pp. 321 - 322, Institute of Electrical and Electronics Engineers, Sep 2004.
Department(s)
Electrical and Computer Engineering
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2025 Institute of Electrical and Electronics Engineers, All rights reserved.
Publication Date
24 Sep 2004
