Abstract

Design of power delivery networks for printed circuit boards hosting both analog and digital parts often employs small power islands for supplying power to sensitive components. While providing necessary isolation from noise generated by other components, the power islands also experience increased inductance due to current crowding at the bridge. In this paper, the inductance at a port on the power island has been quantified. The variation of port inductance with the bridge width and slot/gap width has been studied. It has been demonstrated that the increased inductance adversely affects the effectiveness of decoupling capacitors. This necessitates more careful design of the decoupling capacitors to be placed on the power islands. To enable better design space exploration involving power islands, a methodology to model the inductance of power island ports has been described. To illustrate the effectiveness of the methodology, case studies are presented on (1) finding the region on the main power area with maximum isolation from the power island ports (2) quantification of the loss of decoupling effectiveness as seen by ports on a power island.

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

decoupling capacitor; decoupling effectiveness; noise isolation; Power Delivery Network (PDN); power island

International Standard Book Number (ISBN)

978-153862230-8

International Standard Serial Number (ISSN)

2158-1118; 1077-4076

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.

Publication Date

20 Oct 2017

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