Abstract
Through-silicon-via (TSV) enables vertical connectivity between stacked chips or interposer and is a key technology for 3-D integrated circuits (ICs). While arrays of TSVs are needed in 3-D IC, there only exists a frequency-dependent resistance, inductance, conductance and capacitance circuit model for a pair of TSVs with coupling between them. In this paper, we develop a simple yet accurate circuit model for a multiport TSV network (e.g., coupled TSV array) by decomposing the network into a number of TSV pairs and then applying circuit models for each of them. We call the new model a pair-based model for the multiport TSV network. It is first verified against a commercial electromagnetic solver for up to 20 GHz and subsequently employed for a variety of examples for signal and power integrity analysis. © 1982-2012 IEEE.
Recommended Citation
W. Yao et al., "Modeling and Application of Multi-port TSV Networks in 3-D IC," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 32, no. 4, pp. 487 - 496, article no. 6480846, Institute of Electrical and Electronics Engineers, Mar 2013.
The definitive version is available at https://doi.org/10.1109/TCAD.2012.2228740
Department(s)
Electrical and Computer Engineering
Keywords and Phrases
3-D integration; conductance and capacitance (RLGC) matrices; crosstalk; inductance; modeling; packaging; power delivery; resistance; through-silicon via (TSV)
International Standard Serial Number (ISSN)
0278-0070
Document Type
Article - Journal
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.
Publication Date
25 Mar 2013
Comments
National Science Foundation, Grant 0855878