Abstract
Thermal integrity is one of the most important challenges faced by three-dimensional integrated circuits (3D ICs). Towards this, thermal through-silicon-vias (TTSVs) have been widely used to assist heat dissipation. The metal inside TTSVs can conduct heat more effectively than the silicon substrate, and the metal bumps underneath TTSVs can help heat penetrate through the inter-layer thermal interface material (TIM). However, the surrounding silicon dioxide blocks the heat flowing into them. This makes the effectiveness of TTSVs questionable. In this paper, we argue that some existing TTSV models fail to capture those effects. Experimental results based on finite element simulations verify and confirm that the temperature reduction is indeed brought by the metal bumps underneath the TTSVs rather than the TTSVs themselves. We demonstrate that it is sufficient to add bumps between tiers to reduce temperature without wasting silicon area. © 2013 IEEE.
Recommended Citation
C. H. Chou et al., "On the Futility of Thermal through-silicon-vias," 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013, article no. 6533886, Institute of Electrical and Electronics Engineers, Aug 2013.
The definitive version is available at https://doi.org/10.1109/VLDI-DAT.2013.6533886
Department(s)
Electrical and Computer Engineering
International Standard Book Number (ISBN)
978-146734435-7
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.
Publication Date
15 Aug 2013
