Abstract
In this paper, a new integral equation formulation for via structures is developed for the capacitance extraction between vias and planes. The formulation is initially developed for axially symmetric geometries and then extended to axially asymmetric geometries by changing the circular ring cells to arc cells. The extended method can be used to calculate the shared-antipad via structure, which is widely used in high-speed differential signal interconnects. In addition, the image theory is used to handle inhomogeneous media, and a new technique is given to reduce computational costs for via-to-plane structures based on properties of the capacitance-matrix elements. The proposed method is validated with a commercial finite element method-based tool for several practical via structures. The extracted capacitance is also incorporated into the physics-based via model and validated with full-wave simulations. © 2013 IEEE.
Recommended Citation
H. Wang et al., "Capacitance Calculation for Via Structures using an Integral Equation Method based on Partial Capacitance," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 3, no. 12, pp. 2134 - 2146, article no. 6566102, Institute of Electrical and Electronics Engineers; Electronics Packaging Society, Dec 2013.
The definitive version is available at https://doi.org/10.1109/TCPMT.2013.2272323
Department(s)
Electrical and Computer Engineering
Keywords and Phrases
Equation method; image theory; integral shared-antipad; partial capacitance; via-to-plane capacitance
International Standard Serial Number (ISSN)
2156-3950
Document Type
Article - Journal
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 Institute of Electrical and Electronics Engineers; Electronics Packaging Society, All rights reserved.
Publication Date
01 Dec 2013
Comments
National Science Foundation, Grant 0855878