Abstract
The undesired uncertainties in circuit performance can lead to analog/mixed-signal circuit failures and yield loss at nanoscale. As such, it has become extremely critical for high precision analog/RF circuits such as phase-locked loop (PLL) and custom/mixed-signal circuits such as SRAM arrays, which both have tight operating margin due to lower power supply and higher operating frequency. Many performance-domain techniques have become available in past few decades: the Monte Carlo (MC) method repeatedly draws samples, runs simulations, and evaluates the yield rate, which can be easily applied to high-dimensional problems. However, it is extremely time consuming. IS can reduce the number of samples required to achieve a desired accuracy, especially in the case where the failure region is small for rare failure events. However, it is always challenging to obtain an optimal sampling distribution or shift vector efficiently.
Recommended Citation
F. Gong et al., "Variability-aware Parametric Yield Estimation for Analog/mixed-signal Circuits: Concepts, Algorithms, and Challenges," IEEE Design and Test, vol. 31, no. 4, pp. 6 - 15, article no. 6221038, Institute of Electrical and Electronics Engineers; Circuits and Systems Society; Computer Society, Jan 2014.
The definitive version is available at https://doi.org/10.1109/MDAT.2014.2299279
Department(s)
Electrical and Computer Engineering
Keywords and Phrases
Circuit simulation; Monte carlo; Process variation; Yield analysis
International Standard Serial Number (ISSN)
2168-2356
Document Type
Article - Journal
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 Institute of Electrical and Electronics Engineers; Circuits and Systems Society; Computer Society, All rights reserved.
Publication Date
01 Jan 2014
