Abstract
The large number of interconnects in high-speed circuits is a major bottleneck for fast simulation of such circuits. Recently, waveform relaxation methods based on transverse partitioning (WR-TP) were proposed to address this issue. It was shown that the complexity of WR-TP grows only linearly with the number of lines. However, as the coupling between the lines becomes stronger, the WR-TP algorithm either fails to converge or the number of iterations required for convergence increases. in this paper, an overlapping partitioning method for WR-TP is presented, which overcomes the effect of strong coupling between the lines. Numerical examples are presented which demonstrate the accuracy and efficiency of the proposed method for tightly coupled lines. © 2012 IEEE.
Recommended Citation
M. A. Farhan et al., "Overlapping Partitioning Techniques for Simulation of Strongly Coupled Distributed Interconnects," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 2, no. 7, pp. 1193 - 1201, article no. 6200311, Institute of Electrical and Electronics Engineers; Electronics Packaging Society, May 2012.
The definitive version is available at https://doi.org/10.1109/TCPMT.2012.2195004
Department(s)
Electrical and Computer Engineering
Keywords and Phrases
High-speed interconnects; overlapping partitioning; transient simulation; transverse partitioning; waveform relaxation
International Standard Serial Number (ISSN)
2156-3950
Document Type
Article - Journal
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 Institute of Electrical and Electronics Engineers; Electronics Packaging Society, All rights reserved.
Publication Date
22 May 2012
